Design for Test (DFT) & Performance Verification
Learn how semiconductor chips are tested and validated for performance, reliability, and manufacturing quality.
Duration
32 Hours
Mode
Classroom / Online
Course Overview
Testing ensures that semiconductor devices function correctly after fabrication. This course introduces modern DFT architectures, automated test pattern generation, and emerging AI-based testing techniques used in semiconductor manufacturing.
Key Learning Modules
Module 1: DFT Fundamentals & Fault Models (4 hours)
Understand fault models and manufacturing defects affecting chip reliability.
- Manufacturing defects
- Fault modeling
Module 2: Scan-Based DFT Architecture (6 hours)
Explore scan chains, scan compression techniques, and design guidelines.
- Scan chains, compression
- Scan insertion guidelines
Module 3: ATPG & Test Coverage (6 hours)
Learn automated test pattern generation and coverage metrics.
- ATPG flow
- Coverage metrics
Module 4: Memory & Logic BIST (5 hours)
Understand built-in self-test architectures for memory and logic circuits.
- MBIST architecture
- LBIST concepts
Module 5: AI in DFT & Performance Verification (6 hours)
Discover how AI helps generate test patterns, predict yield, and detect anomalies.
- AI-generated test patterns
- ML-based yield prediction
- Test data compression using AI
- Performance anomaly detection
- Predictive silicon failure analysis
Module 6: DFT & Performance Sign-off (5 hours)
Understand DFT integration and silicon validation.
- DFT integration challenges
- Silicon bring-up case studies
Skills You Will Gain
- Fault modeling
- Scan architecture
- Test coverage analysis
- AI-driven performance analytics
Career Opportunities
- DFT Engineer
- Test Engineer
- Semiconductor Validation Engineer
Journey in DFT Engineering
Join the next batch and start learning industry-level semiconductor design skills.
